Project
Embedded Remote Calculation System
This is a teamwork project intended for 2007 Microsoft ImagineCup Embedded Development Competition with four junior students as the members. In this project we proposed a novel idea to solve a practical problem — how to acquire powerful calculation capability using mobile embedded device. By adopting wireless network technology and Windows Mobile based device, we designed a system that can provide users seamless mobile calculation experience, as well as maximized extensibility and flexibility.
The system we designed consisted of three parts — communication module, remote module, and end-user module. The communication module used TCP/IP protocol as the underlying network layer and employed a custom application layer protocol based on SOCKS interface. It was capable of transmitting large amount of data in universal format reliably. The remote module awaited connection request sent by the end-user module, received and converted the data format, ran the corresponding calculation software with the input data, retrieved the result and sent it back. The end-user module was totally implemented in the target hardware platform, using Windows Mobile technology. It was responsible of taking inputs from the user, as well as reformatting and presenting the calculation result transmitted through network.
Robot Car Design Competition
This is a campus-wide comprehensive electronic design competition in Tsinghua University. The seventh competition in 2005 I participated in was Pushing the Boxes. Contestants should design both the hardware and software parts of a robot car. The car would first follow the specified track to reach the entrance, which was controlled by sensors and MCU. After the car entered the field, an external PC would run the contestant's decision program to generate operating instruction according to the map information shot by a camera, and send it to the car via RF modules. The car received the instructions, and tried to push as many boxes as possible to the goal.
As the captain of our team, I was in charge of the overall architecture as well as the hardware design. The circuits of the car consisted of the driving module and the RF module. The driving module adopted AT89C2051 MCU and L298 chip to control the motors. The MCU dealt with the feedback of the sensors through interrupt service, generated the control signals corresponding to the received instructions, and used PWM output to offer several gears. The development platform for the MCU was Keil uVision3. The RF module was a pair of sending and receiving parts. The sending module connected to the PC and used PT2262 encoding chip. The receiving module was installed in the car and used PT2272 to decode the signals.
Sound Source Localization System
This is a piece of work for the 3rd Hardware Design Competition. The subject was Sound Source Localization Based 3D Mouse in which contestants were required to show the coordinates of the buzzer using microphone arrays. The difficult point lay in the realization of the hardware, which covered a variety of analog and digital technologies. Also, it was a challenge for the contestants' practical ability who were still sophomore.
My solution was to use three pairs of microphones whose location were known and fixed. Two in a pair were placed within a range shorter than a wavelength of sound. The received signal would first be amplified, then pass a bandpass filter, and finally be shaped to square wave. The phase difference in a pair was detected by a flip-flop and RC circuits with a large time constant, so that the result had a linear relationship with the capacitor voltage. After that, an MCU was employed to calculate the coordinates of the source according to the microphone arrays' output by solving an equation set.
Man-100 3D Game Platform
This game was developed by a group of six students to provide a platform for the 4th Duishi AI Program Design Competition. "If you are man, go down 100 steps" — this game couldn't be strange to you, and our developed platform was just based on it. The contestant's program was built into a DLL file, which controlled an AI's behavior. For each round, the platform transmitted the map information to the contestant's decision program which returned an action for the AI, and then the logic module was invoked and map updated. I participated in this platform development group after I won the first prize in the 3rd Duishi AI Program Design Competition as a contestant.
In this game platform, I was in charge of the 3D display module. I self-learned the computer graphics, and adopted Microsoft DirectX SDK as the development tools. To offer realistic 3D effect, I used the HLSL to render some objects. The ultimate display module provided an interactive interface whose viewport and visual angle could be changed according to the user's preference.
Data-Streaming Image Processing Architecture
As the final project for the course Microcomputer Principles, I presented a novel image processing architecture with an FPGA-based realization and analysis. This architecture was aimed at providing a high-performance, data-streaming oriented and expandable image processing system framework for a wide variety of applications. For human face recognition, traffic detection and many other image processing systems, real time becomes a common requirement. Meanwhile, the input and output data show a characteristic of streaming and quantitativeness. So if we apply specific hardware rather than CPU for some basic image processing, the cost of system resources and time will be significantly reduced.
Based on the above thought, I proposed a hardware based and data-streaming oriented image processing system framework. In this framework, a processing unit was directly attached to the serial pathway between the end-user camera and external storage. Thus, we could consider the whole structure as an additional module transparent to upper software which offered processed image with unchanged transmission rate. In the processing unit, there was a small buffer of a size equal to the dimension of transformation matrix, which would lead to a short delay. I implemented the system on Altera Cyclone II FPGA DE2 Board using verilog language, and utilized TRDB DC2 toolkits to include a 1.3M-pix CMOS camera into the system for simulation and verification. This project won the best project with full marks in the final defense of the course.
Two-Stage Opamp with Folded-Cascodes
This is a comprehensive project for the course Analog IC Analysis and Design. The requirement was to design a two-stage MOS operational amplifier with bias circuits under 0.6µm CMOS technology. Also, the final opamp should have a GBW greater than 10MHz, phase margin greater than 60°ree;, slew rate greater than 10V/µs and open-loop gain greater than 60dB under 3V power supply voltage and 10pF load capacitance.
